Profile: Amkor Technology Inc (AMKR.OQ)
15 Jul 2019
Amkor Technology, Inc., incorporated on September 26, 1997, is a provider of outsourced semiconductor packaging and test services. The Company's packaging and test services are designed to meet application and chip specific requirements, including the type of interconnect technology; size, thickness and electrical, and mechanical and thermal performance. It provides packaging and test services, including semiconductor wafer bump, wafer probe, wafer backgrind, package design, packaging, system-level, and final test and drop shipment services. The Company provides its services to integrated device manufacturers (IDMs), fabless semiconductor companies and contract foundries. IDMs design, manufacture, package and test semiconductors in their own facilities. Fabless semiconductor companies focus on the semiconductor design process and manufacturing process.
Packaging and Test Technologies and Processes
The Company's packages employ wirebond, flip chip, copper clip and other interconnect technologies. It uses leadframe and substrate package carriers, and performs a range of test services. In packages that employ wirebond interconnect technology, the die is mounted face up on the package carrier and the interconnections between the die and package carrier are made through fine gold, silver or copper wires, which are attached from the bond pads of the die to the package carrier. The interconnections are placed along the perimeter of the die. In packages that employ flip chip interconnect technology, the interconnections between the die and package carrier are made through conductive bumps that are placed directly on the die surface utilizing a process called wafer bumping. The bumped die is then flipped over and placed face down, with the bumps connecting directly to the package carrier. Flip chip allows a higher number of interconnects than wirebond as it uses the entire surface area of the die, and sometimes the perimeter as well, instead of just the perimeter as used by most wirebond packages. Flip chip also provides enhanced thermal and electrical performance, and enables smaller die and thinner, smaller form factors (or physical package dimensions). The wafer bumping process consists of preparing the wafer for bumping and forming or placing the bumps. Preparation may include cleaning, removing insulating oxides and providing a pad metallurgy that will protect the interconnections while making mechanical and electrical connection between the bump and the wafer.
The Company's Copper clip interconnect technology uses a solid copper bridge or clip to connect the die to the package carrier. The clip allows a higher level of current flow than a wire and also provides a method of heat transfer from the die. The clip is either spot welded, or re-flow soldered, to the die pads and the package carrier pads.
The Company's leadframe is a miniature sheet of metal, made of copper and silver alloys, on which a pattern of electrical connections has been cut. The leads are placed around the perimeter of the leadframe and are used to connect the package to the system board. Its substrate is a laminate of either single or multiple layers of epoxy resin, woven glass fibers and metal conductors. Solder bumps provide the electrical connection to the system board. The bumps are distributed across the bottom surface of the substrate (called a ball grid array format). This allows less distance between individual leads and a higher number of interconnects than leadframe packages.
The Company provides a complete range of semiconductor testing services, including wafer testing or probe and final test. It offers a full range of test software, hardware, integration and product engineering services, and supports a range of business models and test capabilities. Wafer test, also referred to as wafer probe, is performed after wafer fabrication or wafer bumping to screen out defective devices prior to packaging. It offers a range of wafer test coverage that can be tailored based on the cost and complexity of the die, the package and the product. These services range from coarse level screening for major defects all the way up to probing at high digital speeds and can include full radio frequency transmit and receive as well as testing at multiple temperatures. Wafer testing can also involve a range of wafer mapping and inspection operations. After the packaging process, final test is performed to ensure that the packaged device meets the customer's requirements.
The final test spans a range of rigor and complexity depending on the device and end market application. The rigorous types of final test include testing multiple times under different electrical and temperature conditions and before and after device reliability stresses, such as burn-in. In addition to electrical testing, specialized solutions are required for packages that also process non-electric stimuli. The electrical tests are a mix of functional, structural and system-level tests depending on the customer's requirements and cost and reliability parameters. The electrical test equipment the Company use includes available automated test equipment, customized and system level test equipment and types of low cost test equipment developed by the Company.
The Company offers a range of advanced and mainstream packaging and test services. The Company's flip chip, wafer-level processing and related test services are known as Advanced Products. Its wirebond packaging and related test services are known as Mainstream Products. The advanced packages include flip chip chip scale packages, wafer-level chip scale packages and flip chip ball grid array packages. The Flip Chip Chip Scale Package (FC CSP) products are small form factor packages. The Flip chip stacked chip scale packages (FC SCSP) stack a second die on top of the original die. FC SCSP is used to stack memory on top of digital baseband and applications processors for use in mobile devices. The Wafer-level chip scale packages (WL CSP) do not utilize a package carrier. The Flip Chip Ball Grid Array (FC BGA) products are large form factor substrate-based packages, which are used where processing power and speed are needed, and small form factors are not required. The Company offers FC BGA packaging in various product formats to fit a range of end application requirements, including networking, storage, computing and consumer applications.
The Company's mainstream packages include leadframe packages, substrate-based wirebond packages and micro-electro-mechanical systems packages. These package families use wirebond interconnect technology to connect a die to a leadframe or substrate package carrier. The Leadframe packages use wirebond or flip chip technology to interconnect a die to a leadframe package carrier. Leadframe packages are used in many electronic devices. The Substrate-based wirebond packages use wirebond technology to connect a die to a substrate. The packages in this category include stacked CSP, chip array ball grid array (BGA) packages and plastic ball grid array (PBGA) packages. The micro-electro-mechanical systems (MEMS) packages are miniaturized mechanical and electro-mechanical sensors that can sense or provide information about the physical world.
The Company competes with Advanced Semiconductor Engineering, Inc., Siliconware Precision Industries Co., Ltd. and Jiangsu Changjiang Electronics Technology Co., Ltd.
Amkor Technology Inc
2045 East Innovation Circle
TEMPE AZ 85284